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Lead Hardware Design Engineer, General Dynamics Mission Systems

Posted on May 02, 2025Written by General Dynamics Mission Systems

General Description

General Dynamics Mission Systems is hiring a Lead Hardware Design Engineer.

Company Overview

General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high-technology solutions, products, and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in the industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are we value trust, honesty, alignment, and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!

Our Commitment to You

  • An exciting career path with opportunities for continuous learning and development.
  • Research oriented work, alongside award winning teams developing practical solutions for our nation’s security.
  • Flexible schedules with every other Friday off work, if desired (9/80 schedule).
  • Competitive benefits, including 401k matching, flex time off, paid parental leave, healthcare benefits, health and wellness programs, employee resource and social groups, and more.

See more at gdmissionsystems.com/careers/why-work-for-us/benefits.

Workplace Options

This position is fully on-site.  While on-site, you will be a part of our Pittsfield, Massachusetts facility.

We invite you to learn more and apply at GDMS Careers.

Essential Job Functions

As a Lead Hardware Design Engineer, you’ll guide an electrical team of two to five members and coordinate cross-functional teams including mechanical, software, and systems experts. You’ll be responsible for hardware design from requirements analysis through schematic capture, managing layout constraints, supporting PWB layout, manufacturing, integration and test, and qualification. You’ll collaborate with both internal and external stakeholders to develop mission-critical hardware systems.

As a Lead Hardware Design Engineer, you will be involved in all program phases, including:

  • Schedule and budget decisions.
  • Requirements analysis.
  • Subsystem design.
  • Schematic capture.
  • Defining routing constraints.
  • Directing PCB/PWB layout and routing activities.
  • FPGA architecture and firmware.
  • Supporting manufacturing, integration and test, and qualification.
  • Mentoring and growing junior engineers.

You will primarily support the Strategic Systems area developing fire control and launch system hardware, with opportunities to work across GDMS.

Qualifications

Requires a bachelor’s degree in electrical engineering, or a related science, engineering, or mathematics field an eight or more years of job-related experience; or a master’s degree plus six years of job-related experience.

Clearance Requirements

Department of Defense Secret security clearance is required within a reasonable period of time. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.

Skills

What Sets You Apart

  • Ahead of technology trends with research and development (R&D) experience, as well as advanced proficiency in testing, troubleshooting, and analyzing circuit card schematics.
  • Motivated to drive innovation around design architectures, assembly, component selection, and electronics design.
  • Exceptional collaboration and communication skills with demonstrated success leading design teams for complex projects.
  • Team player committed to ongoing professional development for yourself and others.
  • Knowledge of implementation of hardware encryption algorithms.

2025-0062

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